Quad Serial Peripheral Interface (QSPI)

QSPI IP is a high-speed interface designed for fast and efficient communication with external flash memory. It uses four data lines (IO0-IO3) instead of one, enabling higher data transfer speeds. It supports Single, Dual, and Quad SPI modes, enabling up to four times faster data transfer than standard SPI

Sophic silicon Quad Serial Peripheral Interface (QSPI) IP Offers

Quad Serial Peripheral Interface (QSPI)

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Features

Single, Dual and Quad input output
Operates in both master and slave modes
Programable Bytes read/ write to or from flash
Polling mode is for getting status of flash memory
24- and 32-bit addressing mode
WIP bit is used to indicate the status of flash for write and erase operation
Maximum operating frequency is 120 MHz
Full-duplex communication for efficient data transfer
Can be connected to DMA through the DMA Interface
The generic bus interface can be configured to wrapper, enabling integration with APB, AHB OR AXI as required

Diagram

IO Ports

Name	Width	Direction	Description
clk	1	Input	Global clock signal
rst_n	1	Input	Global reset signal
sclk_i	1	Input	Used as input for the clk in slave mode
cs_i	NUM SLAVES	Input	Used as input for chip select in slave mode
rx_i	1	Input	Used for serial data in
scan_mode	1	Input	Scan mode selection signal (DFT Signal)
scan_en	1	Input	Scan enable signal (DFT Signal)
cs_o	NUM SLAVES	Output	Used as output for chip select in master mode
sclk_o	1	Output	Used to output the clk in master mode
txd	1	Output	Used for serial data
Generic Bus Interface	98	Input/Output	Generic Bus Interface Signals. More details in the design document
DMA Interface	137	Input/Output	Generic DMA Interface Signals. More details in the design document

PnR View - 12 nm

IO Ports

Name	Width	Direction	Description
clk	1	Input	Global clock signal
rst_n	1	Input	Global reset signal
sclk_i	1	Input	Used as input for the clk in slave mode
cs_i	NUM SLAVES	Input	Used as input for chip select in slave mode
rx_i	1	Input	Used for serial data in
scan_ mode	1	Input	Scan mode selection signal (DFT Signal)
scan_en	1	Input	Scan enable signal (DFT Signal)
cs_o	NUM SLAVES	Output	Used as output for chip select in master mode
sclk_o	1	Output	Used to output the clk in master mode
txd	1	Output	Used for serial data
Generic Bus Interface	98	Input/ Output	Generic Bus Interface Signals. More details in the design document
DMA Interface	137	Input/ Output	Generic DMA Interface Signals. More details in the design document

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Quad Serial Peripheral Interface (QSPI)

Sophic silicon Quad Serial Peripheral Interface (QSPI) IP Offers

Quad Serial Peripheral Interface (QSPI)

Features

Diagram

IO Ports

PnR View - 12 nm

IO Ports

PnR View - 12 nm

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