The I2S IP is a high-fidelity, low-latency audio interface designed for seamless digital sound transmission. With configurable data formats, precise clock management, and robust FIFO buffering, it ensures crystal-clear audio streaming
Port | Width | Direction | Description |
---|---|---|---|
MCLK | 1 | Input | Global input clock |
rst_n | 1 | Input | Global reset signal |
sck_in | 1 | Input | Serial clock, used in slave mode |
ws_in | 1 | Input | Word select clock, used in slave mode |
sd_in | 1 | Input | Serial data in |
scan_en | 1 | Input | Scan mode selection signal (DFT Signal) |
scan_mode | 1 | Input | Scan enable signal (DFT Signal) |
sck_out | 1 | Output | Serial clock, used in master mode |
ws_out | 1 | Output | Word select clock, used in master mode |
sd_out | 1 | Output | Serial data out |
Generic Bus Interface | 164 | Input/Output | Generic Bus Interface Signals. More details in the design document |
Port | Width | Direction | Description |
---|---|---|---|
MCLK | 1 | Input | Global input clock |
rst_n | 1 | Input | Global reset signal |
sck_in | 1 | Input | Serial clock, used in slave mode |
ws_in | 1 | Input | Word select clock, used in slave mode |
sd_in | 1 | Input | Serial data in |
scan_en | 1 | Input | Scan mode selection signal (DFT Signal) |
scan_mode | 1 | Input | Scan enable signal (DFT Signal) |
sck_out | 1 | Output | Serial clock, used in master mode |
ws_out | 1 | Output | Word select clock, used in master mode |
sd_out | 1 | Output | Serial data out |
Generic Bus Interface | 164 | Input/ Output |
Generic Bus Interface Signals. More details in the design document |