A GPIO Controller IP manages/controls the different General purpose IOs in a SoC and configure them for different applications based on CPU or any other processor command. The GPIO Controller typically manages the input/output operations, interrupt handling, and pin multiplexing etc. In this IP we offer a controller
design which can configure group 32 GPIOs.
| Name | Width | Direction | Description |
|---|---|---|---|
| sys_clk | 1 | Input | Global clock |
| ext_clk | 1 | Input | External clock |
| rst_n | 1 | Input | Used as reset |
| gpio_in | 32 | Input | Connected to input value of IO cells |
| Aux_In | 32 | Input | Auxiliary input |
| gpio_in_ctrl [7:0] | 32*8=256 | Input | Control input pins |
| gpio_out_en | 32 | Output | Connect to output enable of IO cells |
| gpio_out | 32 | Output | Connected to output value of IO cells |
| gpio_out_ctrl [15:0] | 32*16=512 | Output | Control output pins |
| Generic Bus Interface | 99 | Input/Output | Generic Bus Interface Signals. More details in the design document |
| Name | Width | Direction | Description |
|---|---|---|---|
| sys_ clk |
1 | Input | Global clock |
| ext_ clk |
1 | Input | External clock |
| rst_ n |
1 | Input | Used as reset |
| gpio _in |
32 | Input | Connected to input value of IO cells |
| Aux _In |
32 | Input | Auxiliary input |
| gpio_ in_ctrl [7:0] |
32*8 =256 |
Input | Control input pins |
| gpio _out _en |
32 | Output | Connect to output enable of IO cells |
| gpio _out |
32 | Output | Connected to output value of IO cells |
| gpio _out _ctrl [15:0] |
32*16 =512 |
Output | Control output pins |
| Generic Bus Interface | 99 | Input /Output |
Generic Bus Interface Signals. More details in the design document |